vishay semiconductors VLMA3100 document number 81709 rev. 1.0, 24-may-07 www.vishay.com 1 low current smd led plcc-2 features ? smd led with exceptional brightness ? compatible with automatic placement equipment ? eia and ice standard package ? compatible with infrared, vapor phase and wave solder processes according to cecc ? available in 8 mm tape ? low profile package ? non-diffused lens: exce llent for coupling to light pipes and backlighting ? very low power consumption ? luminous intensity ratio in one packaging unit i vmax /i vmin 2.0 ? lead (pb)-free device ? component in accordance to rohs 2002/95/ec and weee 2002/96/ec ? automotive qualified aec-q101 19225 e3 description these new devices have been designed to meet the increasing demand for low current smd leds. the package of the VLMA3100 is the plcc-2 (equivalent to a size b tantalum capacitor). it consists of a lead frame which is embedded in a white thermoplast. the reflector inside this package is filled up with clear epoxy. product group and package data ? product group: led ? package: smd plcc-2 ? product series: low current ? angle of half intensity: 60 applications automotive: backlighting in dashboards and switches ? telecommunication: indicator and backlighting in telephone and fax ? indicator and backlight for audio and video equipment ? indicator and backlight for battery driven equipment ? small indicator for outdoor applications ? indicator and backlight in office equipment ? flat backlight for lcds , switches and symbols ? general use parts table part color, luminous intensity technology VLMA3100-gs08 ye l l o w, i v 0.28 mcd gaasp on gap VLMA3100-gs18 ye l l o w, i v 0.28 mcd gaasp on gap
www.vishay.com 2 document number 81709 rev. 1.0, 24-may-07 vishay semiconductors VLMA3100 note: 1) t amb = 25 c, unless otherwise specified 2) driving the led in reve rse direction is suitable for short term application note: 1) t amb = 25 c, unless otherwise specified 2) in one packing unit i vmax /i vmin 2.0 note: luminous intensity is tested at a current pulse duration of 25 ms and an accuracy of 11 %. the above type numbers represent the order groups which include only a few brightness groups. only one group will be shipped on each reel (there will be no mixing of two groups on each reel). in order to ensure availability, si ngle brightness groups will not be orderable. in a similar manner for colors where wavelength groups are measured and binned, single wavelength groups will be shipped on any one reel. in order to ensure availability, singe wavelength groups will not be orderable. note: wavelengths are tested at a current pulse duration of 25 ms and an accuracy of 1 nm. absolute maximum ratings 1) VLMA3100 parameter test condition symbol value unit reverse voltage 2) v r 6v dc forward current i f 7ma surge forward current t p 10 si fsm 0.5 a power dissipation p v 20 mw junction temperature t j 100 c operating temperature range t amb - 40 to + 100 c storage temperature range t stg - 40 to + 100 c soldering temperature t 5 s t sd 260 c thermal resistance junction/ ambient mounted on pc board (pad size > 16 mm 2 ) r thja 500 k/w optical and electrical characteristics 1) VLMA3100, yellow parameter test condition symbol min typ. max unit luminous intensity 2) i f = 2 ma i v 0.28 2.5 mcd dominant wavelength i f = 2 ma d 581 594 nm peak wavelength i f = 2 ma p 585 nm angle of half intensity i f = 2 ma ? 60 deg forward voltage i f = 2 ma v f 2.2 2.9 v reverse voltage i r = 10 av r 620 v junction capacitance v r = 0, f = 1 mhz c j 50 pf luminous intensity classification group luminous intensity (mcd) min. max. c1 0.28 0.36 c2 0.36 0.45 d1 0.45 0.56 d2 0.56 0.71 e1 0.71 0.90 color classification group dominant wavelength (nm) yellow min. max. 1 581 584 2 583 586 3 585 588 4 587 590 5 589 592 6 591 594
document number 81709 rev. 1.0, 24-may-07 www.vishay.com 3 vishay semiconductors VLMA3100 typical characteristics t amb = 25 c, unless otherwise specified figure 1. forward current vs. ambient temperature figure 2. rel. luminous intensity vs. angular displacement figure 3. forward current vs. forward voltage 0 2 4 6 8 10 i f - for w ard c u rrent (ma) 95 10 8 42 100 8 0 60 40 20 0 t am b - am b ient temperat u re (c) 0.4 0.2 0 0.2 0.4 0.6 95 10319 0.6 0.9 0. 8 0 30 10 20 40 50 60 70 8 0 0.7 1.0 i v rel - relati v e l u mino u s intensity 01 0.1 1 10 100 v f - for w ard v oltage ( v ) 5 95 10053 i f - for w ard c u rrent (ma) yello w t p /t = 0.001 t p = 10 s 23 4 rel. luminous intensity vs. ambient temperature figure 4. rel. lumin. intensity vs. forw. current/duty cycle figure 5. relative luminous intensity vs. forward current 0 0.4 0. 8 1.2 1.6 2.0 i v rel - relati v e l u mino u s intensity yello w t am b - am b ient temperat u re (c) 95 10054 0204060 8 0 100 yello w 10 20 50 100 200 0 0.4 0. 8 1.2 1.6 2.4 96 10264 500 0.5 0.2 0.1 0.05 0.02 1 i f (ma) t p /t i v rel - relati v e l u mino u s intensity 2.0 yello w 0.01 0.1 1 10 100 95 10062 i f - for w ard c u rrent (ma) i v rel - relati v e l u mino u s intensity 100 10 1 0.1
www.vishay.com 4 document number 81709 rev. 1.0, 24-may-07 vishay semiconductors VLMA3100 method of taping/polarity and tape and reel smd led (vlm.3 - series) vishay?s leds in smd packages are available in an antistatic 8 mm blister tape (in accordance with din iec 40 (co) 564) for automatic component insertion. the blister tape is a plastic strip with impressed component cavities, covered by a top tape. taping of vlm.3... reel package dimension in mm for smd leds, tape option gs08 (= 1500 pcs.) reel package dimension in mm for smd leds, tape option gs18 (= 8000 pcs.) prefered figure 6. relative intensity vs. wavelength 550 570 590 610 630 0 0.2 0.4 0.6 0. 8 1.2 650 95 10039 - w a v elength (nm) 1.0 yello w i v rel - relati v e l u mino u s intensity figure 7. tape dimensions in mm for plcc-2 adhesi v etape component ca v ity blister tape 94 8 670 1. 8 5 1.65 4.0 3.6 3.6 3.4 2.05 1.95 1.6 1.4 4.1 3.9 4.1 3.9 5.75 5.25 8 .3 7.7 3.5 3.1 2.2 2.0 0.25 94 8 66 8 figure 8. reel dimensions - gs08 figure 9. reel dimensions - gs18 1 8 0 17 8 identification 4.5 3.5 2.5 1.5 13.00 12.75 63.5 60.5 14.4 max. 10.0 9.0 120 94 8 665 la b el: v ishay type gro u p tape code prod u ction code q u antity 321 329 identification 4.5 3.5 2.5 1.5 13.00 12.75 62.5 60.0 14.4 max. 10.4 8 .4 120 1 88 57 la b el: v ishay type gro u p tape code prod u ction code q u antity
document number 81709 rev. 1.0, 24-may-07 www.vishay.com 5 vishay semiconductors VLMA3100 soldering profile barcode-product-label example: a) type of componenent b) manufacturing plant c) sel - selection code (bin): e.g.: j1 = code for luminous intensity group 3 = code for color group d) date code year/week e) day code (e.g. 1: monday) f) batch no. g) total quantity h) company code dry packing the reel is packed in an anti-humidity bag to protect the devices from absorbing moisture during transportation and storage. final packing the sealed reel is packed into a cardboard box. a secondary cardboard box is used for shipping purposes. recommended method of storage dry box storage is recommended as soon as the aluminum bag has been opened to prevent moisture absorption. the following conditions should be observed, if dry boxes are not available: ? storage temperature 10 c to 30 c ? storage humidity 60 % rh max. after more than 672 hours under these conditions moisture content will be too high for reflow soldering. in case of moisture absorp tion, the devices will recover to the former condition by drying under the following condition: 192 hours at 40 c + 5 c/- 0 c and < 5 % rh (dry air/nitrogen) or 96 hours at 60 c + 5 c and < 5 % rh for all device containers or 24 hours at 100 c + 5 c not suitable for reel or tubes. an eia jedec standard jesd 22-a112 level 2a label is included on all dry bags. figure 10. vishay lead (pb)-fr ee reflow soldering profile (acc. to j-std-020c) figure 11. double wave soldering of opto devices (all packages) 0 50 100 150 200 250 300 0 50 100 150 200 250 300 time (s) temperat u re (c) 240 c 245 c max. 260 c max. 120 s max. 100 s 217 c max. 30 s max. ramp up 3 c/s max. ramp do w n 6 c/s 19 88 5 ir reflo w soldering profile for lead (p b )-free soldering preconditioning acc. to jedec le v el 2a max. 2 cycles allo w ed 255 c 235 c...260 c 2 k/s ca. 200 k/s ca. 2 k/s second w a v e first w a v e ca. 5 k/s 5 s f u ll line: typical dotted line: process limits time (s) temperat u re (c) lead temp erat u re 300 250 200 150 100 50 0 0 100 150 200 250 94 8 626-1 tt w soldering (acc. to cecc00 8 02) 50 100 c...130 c forced cooling 106 37 v ishay a h bc d e f g 20126 al u min u m b ag la b el reel 15973
www.vishay.com 6 document number 81709 rev. 1.0, 24-may-07 vishay semiconductors VLMA3100 example of jesd22-a112 level 2a label esd precaution proper storage and handling procedures should be followed to prevent esd damage to the devices especially when they are removed from the antistatic shielding bag. electro-st atic sensitive devices warning labels are on the packaging. vishay semiconductors standard bar-code labels the vishay semiconductors standard bar-code labels are printed at final packing areas. the labels are on each packing unit and contain vishay semiconductors specific data. package dimensions in millimeters l e v e l caution this bag contains moisture ? sensitive devices 1. shelf life in sealed bag 12 months at <40c and < 90% relative humidity (rh) 2. after this bag is opened devices that will be subjected to infrared reflow, vapor - phase reflow, or equivalent processing (peak package body temp. 260c) must be: a) mounted within 672 hours at factory condition of < 30c/60%rh or b) stored at <1 0% rh. 3. devices require baking before mounting if: a) humidity indicator card is >10% when read at 23c + 5c or b) 2a or 2b is not met. 4. if baking is required, devices may be baked for: 192 hours at 40c + 5c/ - 0c and <5%rh (dry air/nitrogen) or 96 hours at 605 o cand <5%rh for all device containers or 24 hours at 1005c not suitable for reels or tubes bag seal date: ______________________________ (if blank, see bar code label) note: level defined by eia jedec standard jesd22 - a113 2a 197 8 6 95 11314-1 mounting pad layout 3.5 0.2 0.9 1.75 0.10 pin identification 2. 8 + 0.15 2.2 ? 2.4 3 + 0.15 1.2 2.6 (2. 8 ) 1.6 (1.9) 4 4 area co v ered w ith solder resist technical dra w ings according to di n specifications dra w ing- n o.: 6.541-5025.01-4 iss u e: 8 ; 22.11.05 ca
vishay semiconductors VLMA3100 document number 81709 rev. 1.0, 24-may-07 www.vishay.com 7 ozone depleting substa nces policy statement it is the policy of vishay semiconductor gmbh to 1. meet all present and future national and international statutory requirements. 2. regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. it is particular concern to control or eliminate releases of those substances into t he atmosphere which are known as ozone depleting substances (odss). the montreal protocol (1987) and its london amendments (1990) intend to severely restrict the use of odss and forbid their use within the next ten years. various national and international initiatives are pressing for an earlier ban on these substances. vishay semiconductor gmbh has been able to use its polic y of continuous improvements to eliminate the use of odss listed in the following documents. 1. annex a, b and list of transitional substances of the montreal protocol and the london amendments respectively 2. class i and ii ozone depleting substances in the clean air act amendments of 1990 by the environmental protection agency (epa) in the usa 3. council decision 88/540/eec and 91/690/eec annex a, b and c (transitional substances) respectively. vishay semiconductor gmbh can certify that our semico nductors are not manufactured with ozone depleting substances and do not contain such substances. we reserve the right to make c hanges to improve technical design and may do so without further notice. parameters can vary in different applications. all operat ing parameters must be validated for each customer application by the customer. should the buyer use vish ay semiconductors products for any unintended or unauthorized application, the buyer shall indemnify vishay semiconductors against all claims, costs, damages, and expenses, arising out of, directly or i ndirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. vishay semiconductor gmbh, p.o.b. 3535, d-74025 heilbronn, germany
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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